<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Kai Feng | Intelligent Systems Software Lab</title><link>https://issl-uk.com/author/kai-feng/</link><atom:link href="https://issl-uk.com/author/kai-feng/index.xml" rel="self" type="application/rss+xml"/><description>Kai Feng</description><generator>Hugo Blox Builder (https://hugoblox.com)</generator><language>en-gb</language><lastBuildDate>Sun, 03 May 2026 00:00:00 +0000</lastBuildDate><image><url>https://issl-uk.com/media/icon_hu50f38457f6b6599e0d3f54dba46915bd_31456_512x512_fill_lanczos_center_3.png</url><title>Kai Feng</title><link>https://issl-uk.com/author/kai-feng/</link></image><item><title>Interpreter Memory Safety via Differential Fuzzing with a CHERI on Top</title><link>https://issl-uk.com/publication/ismm26/</link><pubDate>Sun, 03 May 2026 00:00:00 +0000</pubDate><guid>https://issl-uk.com/publication/ismm26/</guid><description>&lt;p>&lt;strong>Abstract&lt;/strong>&lt;/p>
&lt;p>Memory safety is a critical issue in embedded systems. Although high-level languages such as MicroPython simplify IoT development, their C-based runtimes remain vulnerable to memory errors triggered by Python code or native extensions. CHERI (Capability Hardware Enhanced RISC Instructions) provides hardware-enforced memory safety, but its effectiveness in exposing latent bugs in real-world interpreters remains underexplored.&lt;/p>
&lt;p>We present diffCHERI:FruitFly, a differential testing framework for systematically uncovering memory defects in MicroPython across conventional x86/Arm platforms and CHERI-enabled Arm Morello hardware. Our framework mines historic vulnerabilities from diverse Python runtimes to extract recurring stress patterns, uses a large language model to generate new test programs, and applies Concrete Syntax Tree (CST) mutation to diversify inputs.&lt;/p>
&lt;p>In 24-hour automated testing, diffCHERI:FruitFly executed 8,189 generated programs on MicroPython v1.20 and the development branch, identifying 40 distinct defects in the conventional build and 51 in the CHERI port. Memory errors that caused silent corruption or weak symptoms on conventional hardware were converted into precise capability faults on CHERI.&lt;/p>
&lt;p>These results show that CHERI not only reduces the attack surface, but also provides an effective memory-safety oracle for revealing latent vulnerabilities in embedded interpreters.&lt;/p></description></item></channel></rss>